AI Hardware Verification Lead
Tenstorrent
AI hardware verification leadership awaits at Tenstorrent in hybrid Toronto, Ontario, using UVM, SystemVerilog, and cocotb. Guide validation for next-generation AI cores. As Verification Lead, you will lead Verification Engineers through complex ASIC and SoC validation. Your work spans AI and machine learning architectures, tensor operations, mixed-precision data types, and on-chip network performance. You will connect hardware architecture, software requirements, and rigorous coverage-driven methodology. Key Responsibilities:
Guide Verification Engineers through complex ASIC and SoC tape-outs Shape test strategies validating AI core functionality and performance Architect plans for FP8, BF16, and INT8 verification Benchmark on-chip networks under demanding traffic conditions Develop portable strategies from simulation through final Silicon Requirements:
Experienced ASIC or SoC verification leadership background Expertise in AI/ML architectures and tensor-based operations Proficiency with UVM, SystemVerilog, and cocotb Experience validating throughput, bandwidth, and congestion management Strong collaboration across hardware and software requirements Lead AI core verification at Tenstorrent through technical mentorship, coverage-driven methodology, and system-level hardware expertise.
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Guide Verification Engineers through complex ASIC and SoC tape-outs Shape test strategies validating AI core functionality and performance Architect plans for FP8, BF16, and INT8 verification Benchmark on-chip networks under demanding traffic conditions Develop portable strategies from simulation through final Silicon Requirements:
Experienced ASIC or SoC verification leadership background Expertise in AI/ML architectures and tensor-based operations Proficiency with UVM, SystemVerilog, and cocotb Experience validating throughput, bandwidth, and congestion management Strong collaboration across hardware and software requirements Lead AI core verification at Tenstorrent through technical mentorship, coverage-driven methodology, and system-level hardware expertise.
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Reference: WJ-3875_15368515