CPU ASIC Design Engineer

You join a flagship Cambridge design centre to help shape high-performance, low-power CPUs at scale. You will work with top architects and peers to transition concepts into silicon, driving RTL development and microarchitecture exploration. The role balances power, performance and area while delivering robust, production-ready designs. You’ll engage across design, verification and physical teams to impact next-generation processor efficiency and capability. This is an opportunity to tackle meaningful CPU challenges in a globally respected engineering environment.

• competitive base salary
• RSUs
• annual bonus
• visa sponsorship
• relocation support

• Collaborate with CPU modelling teams to evaluate high-performance design strategies
• Drive microarchitecture development from concept to detailed implementation
• Own RTL design and refinement, balancing power, performance, timing and area
• Support performance verification to meet architectural goals in silicon
• Collaborate with physical design and cross-functional teams to deliver robust designs
• Contribute to decisions influencing next-generation processor performance and efficiency

• Strong understanding of microprocessor architecture and CPU design principles
• Proficiency in Verilog and/or VHDL
• Solid grounding in logic design, timing closure and power optimisation
• Knowledge of low-power microarchitecture techniques
• Understanding of high-performance CPU design trade-offs and architectural strategies
• Experience with scripting languages such as Perl or Python

• collaboration
• problem-solving
• ability to work with cross-functional teams
• Verilog
• VHDL
• logic design