DPU Verification Engineer – Media IP (Hybrid)
Arm
Arm's Systems Media IP team is seeking an experienced verification engineer to drive verification for a DPU subsystem, shaping architecture, plans and sign-off criteria while contributing RTL, testbenches and verification IP for high-performance compute subsystems.
You will build scalable SystemVerilog/UVM environments, define coverage and regression strategies, and collaborate with architecture, design and software teams to ensure successful integration of DPUs into Arm compute platforms.
#J-18808-LjbffrReference: WJ-766_22273764