IOMMU Verification Engineer for ASIC – Hybrid

Advanced Micro Devices (AMD) is seeking an ASIC Design Verification Engineer to join the NBIO team in Vancouver. You will contribute to verification architecture, test plans, and end-to-end verification of IP blocks across client/server/embedded and graphics chips. You will develop verification environments using SystemVerilog, UVM, and SVA, create test cases, triage regressions, and collaborate with IP architects to deliver high-quality silicon on schedule. Hybrid work in Vancouver is available.

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