Principal Staff Verification Engineer

In this role you will help build and validate configurable IPs that enable interconnectivity across SoCs, chiplets, or multi-chiplet systems. You will join a fast-growing Fabric IP company with a bold AI ambitions, contributing to a growing hardware team in the UK. You’ll design and execute verification test plans, create UVM testbenches, and collaborate with cross-functional teams to ensure robust IP delivery. You will shape the technology portfolio by tackling verification challenges in complex cache, memory, and interconnect subsystems. This is a ground-floor opportunity to help scale a world-class hardware capability and make a tangible impact in AI platforms.

• up to £120,000 base salary
• share options
• performance-based bonus
• onsite work in Bristol or Cambridge

• Create test plans for configurable IPs enabling interconnectivity across SOCs, chiplets, or multi-chiplet systems
• Write UVM/SystemVerilog code to implement test plans, checkers, and scoreboards
• Collaborate with software teams to define and implement configurable testbenches
• Work with design teams on test plans, failure debugging, and coverage tracking

• 6+ years of hands-on block/IP/SoC-level verification
• Proficiency in Verilog and SystemVerilog
• Familiarity with industry-standard EDA tools for simulation and debugging
• Deep experience with UVM-based testbenches
• Experience with Python
• Knowledge of Arm AMBA protocols (AXI, APB, AHB)
• Understanding of Arm CHI protocol is a plus
• Experience with IPs for caches, memory subsystems, interconnects, and NoCs is a plus
• Experience with formal verification techniques and emulation platforms is a plus
• Excellent problem-solving, communication, and collaboration skills

• strong communication
• collaboration
• detail-oriented
• Verilog
• SystemVerilog
• UVM