RTL Design Manager: Scale FPGA/ASIC Teams

Yoh, A Day & Zimmermann Company is seeking a Hardware Design Manager to build the engineering capability needed to deliver an expanding portfolio of FPGA and ASIC products.

You will lead a distributed RTL design team, improve processes, and foster an environment where engineers can deliver complex hardware while removing friction and bottlenecks. This role requires strong leadership across architecture, RTL and verification, with experience in FPGA/ASIC and a track record of scaling teams.