RTL & Microarchitecture Lead for High-Speed Interconnect

Arm is seeking a senior RTL and microarchitecture engineer to own the design of high-speed interconnect subsystems across multiple silicon products, including PCIe, CXL, and UALink. You will translate system requirements into microarchitecture specs, interfaces, and synthesizable RTL.

You will drive the development process from concept through RTL creation, subsystem integration, verification support, synthesis readiness, and final delivery, collaborating with architecture, verification,