Senior AMS DV Engineer — Mixed-Signal Verification

Apple located in London is seeking a forward-thinking Design Verification Engineer to enable bug-free first silicon for mixed-signal designs. You will define verification environments, write test scenarios and assertions, and collaborate closely with Analog and Digital Design engineers to deliver robust validation.

The role emphasizes SystemVerilog/UVM-based verification, constrained random testing, and lab bring-up in a cutting-edge AMS DV team focused on innovative verification techniques.