Senior Analog Design Architect – High-Speed IP

Synopsys, Inc. is seeking a senior analog/mixed-signal IC design engineer to advance high-speed CIRCUITS in FinFET nodes.

You will review JEDEC standards, define sub-block specs for DDR/LPDDR, HBM, UCIe, and mobile storage IP, and design transistor-level circuits with a focus on reliability and performance. Ideal candidates hold a PhD with extensive experience or a Master’s with substantial industry background.