Senior Verification Engineer

Overview

In this role you will own verification strategy for cutting-edge AI accelerator IP and SoCs, shaping verification methodology and building scalable environments. You will collaborate with RTL, Architecture, and Software teams to influence architectural decisions and drive quality in the development flow. You’ll develop end-to-end testbenches, monitor coverage, and implement automation to boost engineering efficiency. This is a hands-on, ownership-driven opportunity to impact next-generation AI hardware within a fast-moving team.

Responsibilities

• Define and own the verification strategy for complex AI accelerator IP and SoC components
• Develop verification plans, testbenches and end-to-end verification environments
• Monitor functional coverage, verification metrics and design quality
• Collaborate closely with RTL, Architecture and Software teams
• Influence future architecture through verification feedback
• Develop automation and verification infrastructure to improve efficiency
• Drive continuous improvements to verification methodology and design quality

• Strong experience developing verification plans for complex ASIC or SoC designs
• Experience verifying designs using AXI or similar on-chip bus protocols
• Familiarity with commercial verification toolchains and open-source environments (Cocotb, Verilator)
• Scripting experience with Python, Tcl or similar
• Knowledge of CI/CD workflows and automated verification infrastructure
• Experience with transaction-level verification methodologies, ideally UVM
• Familiarity with Git or other version control systems
• Exposure to formal verification techniques (advantageous)

• collaboration
• effective communication across multidisciplinary teams
• problem-solving for complex verification challenges
• AXI or similar on-chip bus protocols
• Cocotb
• Verilator