Senior Verification Engineer: RTL/UVM for Wireless IP

AccelerComm Ltd in Southampton, UK seeks a Senior Verification Engineer to drive full lifecycle verification of RTL IP across ASIC/FPGA; you will develop verification plans, create UVM testbenches and support integration and tape-out readiness.

Requirements include 3+ years in digital verification, strong SystemVerilog/UVM, Linux scripting and a collaborative mindset. Hybrid working with a competitive package is offered.