Verification Engineer

In this role you will verify RISC-V processors and extensions and develop verification solutions, collaborating across teams to deliver end-to-end verification for a new platform. You will define verification strategies, review specifications, run simulations, debug complex issues, and drive automation of verification flows. The opportunity centers on cyber-resilient architectures and clean-sheet designs at Codasip’s UK centres, with impact across high-performance and embedded CPU domains.

• Verify RISC-V processors and extensions
• Develop verification solutions (test benches, stimulus generation, formal environments)
• Collaborate with engineers to deliver all verification activities for a component/subsystem
• Define verification strategies and select appropriate tools
• Review specifications from a verification perspective
• Run simulations, identify bugs, perform root-cause analysis
• Define, estimate, prioritise and track own work
• Track and report verification metrics
• Craft automated verification flows

• Commercial experience with functional processor verification methodologies (CPU/ASIC)
• Knowledge of verifying CPU architectures or other IP
• Fluency in SystemVerilog, Python, C++, Rust
• Past verification ownership of a design block
• Linux user-level automation
• Knowledge of versioning tools (Git, SVN)
• Knowledge of RISC-V Architecture
• Strong understanding of computer systems and architecture
• Analytical thinking and team collaboration

• Analytical thinking
• Team collaboration
• Cross-team debugging
• SystemVerilog
• Python
• C++